Modeling, Prediction, and Results Correction of PDSH Circuits for Nanosecond Pulse Peak Detection

Abstract

The peak detect and sample hold (PDSH) circuit is an important component of the light detection and ranging (LiDAR) system, because the PDSH circuit can correct the walk error of the time discriminator, and distinguish different objects at the same location. However, due to the requirement for high-precision measurement of nanosecond-scale pulse signals, the design of the PDSH circuit presents significant challenges. This paper accomplishes the modeling of the PDSH circuit, including the modeling of the PDSH measurement speed and the voltage step, quantifies various factors that affect the PDSH circuit measurement results, and makes predictions based on the model. Through the derivation and simplification of the rise process in the PDSH circuit, this study establishes a mathematical model to predict the performance of the PDSH circuit. Furthermore, this study also investigates the effect of circuit delay time on the measurement speed of the PDSH circuit. Meanwhile, this study analyzes the voltage step process, and an equivalent circuit model is derived through theoretical analysis. By utilizing a fitting method, the equivalent capacitance value of the diode is obtained. The simulation and experiment results show that the errors between the measurement speed model of the PDSH circuit and the actual circuit are no more than 1.98 ns and 2.03 ns, respectively. Thus, the measurement speed model can accurately predict whether the PDSH circuit meets the requirements. Moreover, the maximum absolute error of the equivalent circuit model is 19.87 mV, which can significantly reduce the error caused by the voltage step.

1. Introduction

The peak detection and sample hold (PDSH) circuit is important in the pulsed time of flight (ToF) light detection and ranging (LiDAR) system [1,2,3,4,5]. The PDSH circuit captures the pulse signal and obtains the accurate amplitude of the signal, which provides precise distance information for the ToF LiDAR system. However, with the development of ToF LiDAR systems, the pulse width that needs to be detected reduces, while the accuracy requirement intensifies significantly [6]. Especially when the pulse width approaches the nanosecond domain, the LiDAR system requires a very fast response [7]. Furthermore, in the nanosecond domain, the parasitic parameters, such as parasitic capacitance and parasitic resistance, deteriorate the magnitude response, and accordingly affect the distance information required by the ToF or LiDAR system [8,9]. Therefore, designing PDSH circuits for nanosecond pulse peak detection is both important and challenging [10,11,12,13,14].

The most widely used CMOS-based PDSH circuit in industry is shown in Figure 1 [15]. The circuit charges a capacitor through a switch, either a diode or a MOS. When the input voltage V_i is greater than the output voltage V_o on the sampling capacitor C_h, the switch is turned on, and the input voltage charges the capacitor. Conversely, the switch is turned off, and capacitor C_h maintains the peak voltage, which can be measured using the ADC sampling method [16,17,18]. Therefore, the control signal of the switch will directly affect the measurement of the pulse peak. However, the circuit is only valid for ms-scale pulse width detection and needs to be improved for ns-scale pulse width detection.

Dlugosz et al. [19] proposed a PDSH circuit using a current-mode latching mechanism and flag generation circuitry to control the switch, which had shallow energy consumption. However, it can only measure the ms-scale pulse width. Jayaraman et al. [20] also designed a CMOS peak detector, which used CMOS to control the charging and discharging of the capacitor. However, the driving ability is relatively small, and the measurement accuracy decreases.

The OTA-based PDSH circuit with negative feedback can overcome the shortcomings of the PDSH circuit [21,22,23]. Haas et al. [21] proposed an improved PDSH circuit, which would take the output voltage as input to the negative input of the transconductance operational amplifier (OTA) and use the voltage Buffer to output the result. Hao et al. [22] used OPA615 to build the PDSH circuit, analyzed the circuit’s bandwidth, and completed the measurement of the pulse peak of 100 ns pulse width and 20 kHz repetition frequency. Moreover, Zhang et al. [23] used the same circuit to measure the peak value of a laser pulse with a pulse width of 200 ns. The PDSH circuit based on OTA IC chips has the advantages of easy construction, fast measurement, low cost, and convenient use. As the output current of OTA is variable, the circuit overshoot is slight. The OTA’s maximum output current limits the circuit’s maximum measurement speed, and the voltage step phenomenon will lead to significant measurement errors.

To overcome the error caused by the voltage step of the PDSH circuit based on OTA, a CMOS PDSH circuit was proposed by Kruiskamp [24], where a current mirror was used instead of a diode to nonlinear solute problems caused by the diode. However, it also produces new problems, such as significant overshoot, large pedestal voltage, and tradeoffs between measurement accuracy and speed. Geronimo et al. [25] proposed the two-phase peak detector to overcome the tradeoff between measurement accuracy and speed. Nevertheless, it can only measure the μs-scale pulse width. Recently, Zheng et al. [2] presented an auto-adjust charging current CMOS PDSH circuit, which reduced errors caused by the pedestal voltage and overshoot voltage. Similarly, Ma et al. [3] proposed using a controlled current source instead of a current mirror to reduce the error. However, there is still the problem of slow measurement. Thus, CMOS PDSH circuits improve some problems of PDSH circuits based on OTA chips but also have disadvantages, including inconvenient construction and higher cost, in addition to the above.

In summary, CMOS PDSH circuits have drawbacks such as slow measurement speed, large pedestal voltage, and overshoot voltage, as well as a long production cycle. Although the OTA-based PDSH circuit can decrease the pedestal voltage and the overshoot, the voltage step phenomenon results in significant measurement error. Therefore, neither the CMOS-based PDSH nor the OTA-based PDSH circuit can meet ns-scale pulse peak detection. In order to accurately measure the peak value of nanosecond pulse signals, this study undertook a comprehensive theoretical modeling of the PDSH circuit. The accurate modeling aims to identify the primary factors that influence the measurement speed of the PDSH circuit. Meanwhile, in order to correct the voltage step error in PDSH circuit measurements and improve measurement accuracy, this study also proposes an equivalent circuit modeling approach for the voltage step process in the PDSH circuit. This equivalent circuit predicts the error due to the parasitic parameters. Finally, the study corrects the predicted error. With these three steps, i.e., modeling, prediction, and results correction, the proposed method can meet both the time requirements and voltage step requirements of ns-scale pulse peak detection.

The rest of this paper is organized as follows. Section 2 investigates the PDSH circuit based on OTA, and the mathematical model is built to describe the main factors affecting PDSH measurement speed. Meanwhile, Section 2 also presents the equivalent circuit model. The simulations and experiments are carried out to verify the mathematical and equivalent circuit models’ correctness in Section 3. Finally, Section 4 concludes this paper.

2. Modeling of the PDSH Circuit

The PDSH circuit based on the OTA chip consists of OTA, diode, sampling capacitor, and voltage Buffer, as shown in Figure 2. OTA can amplify and convert the difference between the non-negative input voltage V_i and the negative input voltage V_o into the output current I_o. Therefore, if the input voltage V_i is greater than the output voltage V_o, the output current of OTA charges the sampling capacitor C_h through diode. While V_i is smaller than V_o, the diode is reverse-biased, and the PDSH circuit is forced into a hold state. Subsequently, the output voltage of the PDSH circuit is determined as the peak value of pulse signal, and it can be acquired by using a low-speed ADC.

The voltage–current characteristic curve of OTA is commonly classified into two main regions, namely the linear region and the saturation region. When the differential input voltage is less than the threshold voltage V_th, the OTA operates in the linear region, and the output current I_o can be described by (1), where g is the transconductance of OTA.

$$I_o=g(V_i-V_o)$$

(1)

When the differential input voltage is greater than the threshold voltage V_th, the OTA operates in the saturation region, and the output current remains at the maximum output current I_om, expressed as (2).

$$I_{om}=g{V}_{th}$$

(2)

The actual OTA devices exhibit a linear offset in the output current in the saturation region, denoted by k. Therefore, the output current I_o in the saturation region can be described (3) and (4).

$$I_o=k(V_i-V_o)+b$$

(3)

$$b=g{V}_{th}-k{V}_{th}$$

(4)

2.1. The Measurement Speed of the PDSH Circuit

The measurement speed of the PDSH circuit is a critical factor determining whether the PDSH circuit can accurately measure the peak value of a pulse. Therefore, an analysis of the measurement speed of the PDSH circuit is conducted here.

The input pulse signal V_i is assumed to consist of three stages: rising period, plateau period, and falling period, as shown in Figure 3. In the rising period, the input voltage V_i can be described by (5), where t_r represents the rise time. And in the falling period, V_i can be described by (6), where t_f is the fall time. During the plateau period, V_i maintains a constant peak value V_m, and the duration is t_h.

$$V_i(t)=\frac{V_m}{t_r}t$$

(5)

$$V_i(t)=-\frac{V_m}{t_f}(t-t_r-t_h-t_f)$$

(6)

When the assumed pulse signal V_i is applied as the input to the PDSH circuit, the output voltage of the PDSH circuit without considering delay is shown in Figure 3.

Initially, the OTA operates in the linear region, and the output voltage V_o can be expressed by (7).

$$C_h\frac{d{V}_o}{dt}=g(V_i-V_o)$$

(7)

Using the difference between the input voltage V_i and the output voltage V_o as the variable, (7) can be rewritten as (8).

$$\frac{d\Delta V}{dt}+\frac{g}{C_h}\Delta V=\frac{V_m}{t_r}$$

(8)

According to the initial conditions ΔV(0) = 0, the solution of the equation is expressed as

$$\Delta V=\frac{C_h{V}_m}{g{t}_r}(1-e^{-\frac{g}{C_h}t})$$

(9)

The difference between the input voltage and the output voltage is equal to C_hV_m/gt_r. The condition for the OTA to not enter saturation region can be expressed as (10). According to (2), the condition can also be expressed as (11)

$$\frac{C_h{V}_m}{g{t}_r}<V_{th}$$

(10)

$$\frac{I_{om}}{C_h}>\frac{V_m}{t_r}$$

(11)

The difference between the input voltage and output voltage is no more than V_th at this time. Since V_th is very small, the measurement speed of the PDSH circuit meets the requirements for detecting the peak value of the pulse signal when (11) is satisfied.

However, when the OTA enters the saturation region, the difference between the input voltage and the output voltage gradually increases, indicating that the measurement speed of the PDSH circuit is insufficient, and the output voltage cannot keep up with the input changes.

Assuming that the PDSH circuit enters the saturation region at time t₀ and returns to the linear region at time t₁, the output voltage of the PDSH circuit during the time interval from t₀ to t₁ can be expressed by (12).

$$C_h\frac{d{V}_o}{dt}=k(V_i-V_o)+b$$

(12)

The solution of (12) can be obtained by incorporating the output voltage at time t₀, but it is not intuitive to observe the main factors that affect the PDSH output voltage. Therefore, a simplification of (12) is necessary. As the value of k is very small, Equation (12) can be simplified to

$$C_h\frac{d{V}_o}{dt}=I_{om}$$

(13)

Furthermore, due to the short time that OTA works in the linear region and the relatively small output current, it can be assumed that the output voltage of the PDSH circuit is described by (12) during the entire charging phase of the sampling capacitor. At this point, the output voltage V_o can be expressed as

$$V_o=\frac{I_{om}}{C_h}t$$

(14)

Therefore, the measurement speed of the PDSH circuit can be described as

$$\frac{d{V}_o}{dt}=\frac{I_{om}}{C_h}$$

(15)

The main factors affecting the measurement speed of the PDSH circuit are the maximum output current of the OTA I_om and the sampling capacitance C_h, as indicated by (11) and (15).

The error mainly stems from two simplification processes during the charging of the sampling capacitor. During the simplification process, the influences of the parameters V_th and k are mainly neglected, as well as the charging current when the OTA is operating in the linear region. The delay of both devices and circuits is also one of the sources of error in the simplified model.

In conclusion, the measurement speed of PDSH circuit is sufficiently fast to enable the output voltage to fully keep up with the input signal, when (11) is satisfied. However, when (11) is not satisfied, the measurement speed can be expressed by (15), and in this case, the PDSH circuit needs to spend some time to measure the peak value of the pulse signal.

2.2. The Calibration of Voltage Step Error

Measurement accuracy is another important requirement of the PDSH circuit. The OTA-based PDSH circuit exhibits a low pedestal voltage and a small overshoot voltage due to the adjustable output current of the OTA with respect to the input voltage. However, due to the presence of diodes, the OTA-based PDSH circuit has relatively large measurement errors caused by the voltage step phenomenon.

When the PDSH circuit completes the peak value measurement of the pulse, the output voltage of the OTA is equal to the negative saturation voltage of the OTA [10,24]. At this moment, the diode switches from forward bias to reverse bias. When a diode is forward-biased, current flows through the diode, causing the diffusion of electrons and holes and giving rise to the existence of the diffusion capacitance. In the case of reverse bias, the diode is in a cutoff state, but due to the presence of a certain amount of charge carriers in the depletion region, the depletion capacitance exists at this time. During the transition of a diode from forward bias to reverse bias, both the diffusion capacitance and depletion capacitance must absorb charge from the sampling capacitor. As a result, the sampling capacitor will discharge when the diode changes from forward bias to reverse bias, resulting in the step voltage error as shown in Figure 3. Due to the nonlinearity in the variation of depletion capacitance with reverse bias voltage, the analysis of voltage step processes becomes highly intricate. To simplify the analysis, an equivalent capacitor was used to realize the equivalent process of the diode from forward bias to reverse bias. Therefore, during the transition of the diode from forward bias to reverse bias, an ideal diode and an equivalent capacitor C_eq were used in parallel for equivalent substitution, as shown in Figure 4.

In order to correct the voltage step error, it is necessary to establish the relationship between the final output voltage V_f and the peak voltage V_m.

When the PDSH circuit completes the peak value measurement of a pulse signal, the voltage on the sampling capacitor is equal to the peak voltage V_m, and the output voltage of the OTA is higher than the peak voltage V_m by the forward voltage of a conduction diode V_on. Subsequently, the output voltage of OTA rapidly changes to the negative saturation voltage of OTA V_n, and the sampling capacitor charges the equivalent capacitor until reaching the final voltage V_f.

According to the law of conservation of charge, the following equation holds.

$$C_{eq}{V}_{on}+C_{eq}(V_f-V_n)=C_h(V_m-V_f)$$

(16)

The final voltage V_f can be expressed as

$$V_f=V_m-\frac{C_{eq}}{C_{eq}+C_h}(V_m+V_{on}-V_n)$$

(17)

The value of the voltage step can be described as

$$V_{step}=\frac{C_{eq}}{C_{eq}+C_h}(V_m+V_{on}-V_n)$$

(18)

Therefore, the important factors affecting the voltage step error include the equivalent capacitance of the diode, the sampling capacitance, the peak value of the pulse voltage, the forward voltage of the diode, and the negative saturation voltage of the OTA. The paper measures the final voltage V_f at different sampling capacitance C_h and fits the data by using (18) to determine the equivalent capacitance of the diode.

Furthermore, the magnitude of the voltage step can be calculated using (18), which can be used to correct the measurement results of the PDSH circuit and reduce the voltage step error.

3. Circuit Simulation and Experiment

Simulation and experimental circuits for the PDSH circuit are constructed, according to Figure 2. Considering the measurement of nanosecond-scale pulse peak, OTA should possess features of high bandwidth, high slew rate, and low delay. In this paper, the OPA615 chip is selected as the OTA to construct the PDSH circuit. The parameters g, V_th, I_om, and k can be obtained by DC scanning of the OPA615 by using the simulation software. Following that, the diode uses the simulation model of 1N4148. The simulation circuit diagram of the PDSH circuit in PSpice is shown in Figure 5.

The schematic diagram and experiment diagram of the overall system are shown in Figure 6 and Figure 7, respectively. The pulse signal is generated by the signal generator RIGOL DG4602, while employing FPGA triggering techniques to achieve pulse widths in the nanosecond range. And the power supply for the experimental PCB board is provided by the DC power supply RIGOL DP831, while the signal measurements are performed using the oscilloscope Agilent DSO7104B. After the completion of the PDSH circuit measurement, in order to measure the peak value of a single pulse signal, the FPGA was utilized to control the discharge of the sampling capacitor through the MOSFET. This discharge was performed to prevent any interference from the previous measurement, ensuring the accuracy and reliability of the current measurement. Furthermore, OrCAD Capture 16.6 (PSpice) software was also used to verify the results of the model.

Figure 8 illustrates the dynamic measurement process of the PDSH circuit with C_h = 30 pF, t_r = 10 ns, and V_m = 1 V. Since the maximum output current of OPA615 is 5 mA, which satisfies (11), the output voltage of the PDSH circuit can keep up with the input signal variation. The horizontal axis represents time, while the vertical axis represents voltage. The simulation results indicate that the difference between the input and output voltages is always smaller than the threshold voltage, shown as (b), which is consistent with the theoretical prediction.

Figure 9 illustrates the dynamic measurement process of the PDSH circuit with C_h = 30 pF, t_r = 10 ns, and V_m = 3 V. The horizontal axis represents time, while the vertical axis represents voltage. Based on the fact that the charging rate I_om/C_h of the sampling capacitor is smaller than the rising rate V_m/t_r of the input signal, the difference between the input and output voltages will be greater than the threshold voltage. Therefore, the PDSH circuit needs to spend a certain amount of time to accurately measure the peak value of the pulse, according to the theory.

Figure 8 and Figure 9 also show that the slew rate of the OTA is lower than the rise rate of the input signal. Although the OTA will charge the capacitor at the maximum output current at this time, the output voltage of the PDSH circuit still cannot keep up with the input signal.

The measurement speed of the PDSH circuit can also be characterized by the rising time of the output voltage. The derivative of the output voltage with respect to time reflects the instantaneous measurement speed of the PDSH circuit, while the rising time can reflect the average measurement speed.

In this paper, the Simulink tool in MATLAB was used to model the measurement process of the PDSH circuit. Simulink allows the insertion of delay modules, which enables a more precise description of the measurement process of the PDSH circuit.

Figure 10a shows the rising time of the output voltage in simulation, delayed model, non-delayed model, and simplified model with different sampling capacitances. And Figure 10b demonstrates the rising time of the output voltage under different peak values of the input signal. The figure indicates that the delay time, as a secondary factor, can also have an impact on the measurement speed of the PDSH circuit. Meanwhile, the maximum error between the simplified model and the simulation results is 1.98 ns when C_h is 100 pF, indicating that the simplified model can accurately describe the measurement speed of the PDSH circuit.

Figure 10 shows that the main source of error in the simplified model is not the delay time of the system but the simplification of the capacitor charging process, and the error is within the acceptable range.

Figure 11 illustrates the rising time of the output voltage for experimental, delayed model, and simplified model at different peak voltages. The results indicate that the maximum error between the simplified model and experiment results is 2.03 ns.

Simulations and experiments show that the simplified model can accurately and simply describe the measurement speed of the PDSH circuit.

In order to quantitatively describe the step voltage error, the equivalent capacitance C_eq of the diode must be solved. According to (18), the equivalent capacitance C_eq can be obtained by fitting the data based on the final voltage V_f under different sampling capacitance C_h. The change of equivalent capacitance of the diode can be achieved by changing the junction capacitance of the diode in the simulation software.

Figure 12 illustrates the relationship between the final output voltage V_f and the sampling capacitance C_h for different diode junction capacitances C_j when the peak voltage V_m is 2 V. The horizontal axis represents the sampling capacitance C_j, while the vertical axis represents the final voltage V_f. The simulation results are represented by dots, and the fitting curve based on (18) is shown as a solid line. Therefore, the equivalent capacitance C_eq of the diode can be calculated according to (18). Figure 12 shows that the relationship between the final output voltage and the sampling capacitance follows (18), which verifies the correctness of the voltage step model.

Based on the above method, several types of diodes are experimentally measured for their equivalent capacitance C_eq, and the results are shown in

Table 1. Diodes and equivalent capacitance.

Diode	Type	Trr	Cd	Ceq
BAT54S	Schottky	5 ns	10 pF	2.87 pF
BAW56	Switching	6 ns	2 pF	2.14 pF
SMMBD914	Quick recovery	4 ns	4 pF	1.98 pF
HSMS2812	Schottky		1.2 pF	0.89 pF

. The reverse recovery time T_rr and diode capacitance C_d are obtained from the datasheet.

The simulation results in Figure 13 show that the final output voltage V_f varies linearly with the peak voltage V_m at different equivalent capacitance C_eq. The solid line represents the fitting curve obtained from (18), and the dots represent the simulation results. The horizontal axis represents the peak value of input pulse signal, while the vertical axis represents final voltage. Due to the existence of voltage step, there is a threshold for the measurement of the PDSH circuit, and the output of the PDSH circuit is 0 V when the peak voltage is less than the threshold. According to (18), the magnitude of the threshold is determined by the relative values of the equivalent capacitance C_eq and the sampling capacitance C_h. The linear relationship between the final output voltage V_f and the peak voltage V_m is also confirmed in experiments using different types of diodes, as shown in Figure 14.

Figure 13 and Figure 14 verify that the final output voltage V_f and peak voltage V_m meet the (18) in both simulation and experiment, thus confirming the accuracy of the voltage step model.

The voltage step error of the PDSH circuit can be corrected using the linear relationship between the final output voltage V_f and the peak voltage V_m. Figure 15 illustrates the error between the correction value of the final output voltage V_f and the peak voltage V_m.

The horizontal axis represents the peak value of input pulse signal, while the vertical axis represents the error between peak value and correction value. Experimental results demonstrate that the maximum measurement error of the PDSH circuit after voltage step error correction is 19.87 mV. Therefore, Figure 15 shows that the calibration of voltage step error significantly improves the measurement accuracy of the PDSH circuit.

The preceding section presents a derivation of the factors influencing the measurement speed of the PDSH circuit for nanosecond pulse. Additionally, the equivalent circuit model is established for the voltage step process in the PDSH circuit, effectively reducing voltage step errors. In this section, the simplified model derived in this paper for the measurement speed of the PDSH circuit yields a maximum error of 1.98 ns in simulation results and 2.03 ns in experimental results. In comparison to Haas’ analysis of the dynamic performance of the PDSH circuit [21], as well as the circuit bandwidth analysis conducted by Hao [22] and Zhang [23], the simplified model proposed in this study provides a clear and straightforward approach to determine the capability of the PDSH circuit in accurately measuring nanosecond pulse peak values. Furthermore, in order to mitigate voltage step errors, Kruiskamp [24] and Lipika [10] analyzed the underlying causes of voltage step phenomena and proposed a CMOS PDSH circuit. While the CMOS PDSH circuit successfully avoids the generation of voltage step errors, some new issues are introduced, such as overshoot and pedestal voltage errors. In contrast, this study addresses voltage step errors by establishing an equivalent circuit model for the voltage step process in the PDSH circuit. Experimental results demonstrate that after voltage step error correction, the maximum measurement error of the PDSH circuit is reduced to 19.87 mV. The simplified model solely focuses on the primary factors, which influence the measurement speed of the PDSH circuit and necessitate the integration of circuit dynamic performance and bandwidth for accurate pulse peak value measurements. The holistic approach enables the construction of a rational PDSH circuit that incorporates critical considerations. To further reduce voltage step errors, it is advisable to select diodes with smaller equivalent capacitance, or to utilize a specific circuit configuration to ensure that the output voltage of the OTA exceeds its negative saturation voltage.

4. Conclusions

The measurement speed and accuracy are important characteristics of the PDSH circuit. Therefore, this paper investigates the measurement speed and accuracy of PDSH circuits using OTA-based PDSH circuits. This paper establishes a model for the measurement process of PDSH circuits while also examining the factors that impact measurement speed. Meanwhile, in order to correct errors caused by the voltage step, this paper also proposes an equivalent circuit model for the diode and derives the factors that affect the magnitude of the voltage step error during the hold phase in PDSH circuit.

The simplified model proposed in this study for the measurement speed of the PDSH circuit facilitates accurate predictions of the rise time of the PDSH circuit’s output voltage. The application of the simplified model to forecast the rising time of the output voltage yields a maximum deviation of 1.98 ns and 2.03 ns, respectively, when compared to the results obtained from simulations and experiments. Moreover, after the calibration of the voltage step error, the maximum measurement error of PDSH circuit is 19.8 mV, significantly improving the measurement accuracy of the PDSH circuit. Thus, the modeling and prediction of the PDSH circuit in this study enable the precise measurement of peak values for nanosecond-width pulses to become achievable. However, there are also limitations regarding the application of the model [26,27,28]. Specifically, the voltage step model proposed in this study can only be used to correct the output of the PDSH circuit when the input pulse signal exceeds the threshold voltage. Due to the voltage step, when the amplitude of the input pulse is below the threshold voltage, the output of the PDSH circuit is 0, making using the PDSH circuit a significant challenge to measure and calibrate the extremely weak pulse voltage amplitudes. Therefore, accurately measuring tiny pulse voltage amplitudes is a crucial research focus for the future.